Generally, when forming a D/A converter, n number of unit cells (U) are selected in order to obtain a current output from the D/A converter corresponding to a digital output signal. In this way, an output (Y) becomes Y=U×n and digital/analog conversion takes place. In the case where a unit cell is a current source (IU), the output current becomes Y=IU×n and in the case where a unit cell is a voltage source (VU), the output voltage becomes Y=VU×n.
However, generally an output value (current value or voltage value) of a current source or a voltage source which forms a unit cell has errors due to the effects of manufacturing variations. When each error held by the unit cell is εi the output Y can be expressed as the following formula.
                    Y        =                              U            ×            n                    +                                    ∑                              i                =                1                            n                        ⁢                          ɛ              i                                                          [                  Formula          ⁢                                          ⁢          1                ]            That is, there are errors in the formula which express the output Y. Differential linearity error (DNL) which is the indicator of the capability of a D/A converter becomes DNL=εi because of these errors. Therefore, there is a problem whereby the extent of unit cell manufacturing variation determines the conversion accuracy of the D/A converter.
In order to overcome this type of problem, a dynamic element matching method (referred to as error diffusion technology hereinafter) is proposed for selecting units independently from inputting. For example, the operating principles of an error diffusion circuit are described in the section 8.8.3 of “Delta-Sigma Data Converters” IEEE Press 1997 ISBN 0-7803-1045-4.
When there is an error in a unit cell, the error remains in an adder without being cancelled out when outputting 0 as a value (outputting a value 0). This error deteriorates the DNL as stated above. Therefore, a selection device which is inserted between the D/A converter and a unit cell is used in error diffusion technology. The errors can be smoothed by changing the selection method of the unit cell even if an input to the selection device is the same. Here, “selection” means outputting a signal, which instructs an output of a predetermined value, to the unit cell. In addition, when outputting an instruction signal so that a value 0 is output by a unit cell, that unit cell is said to be not selected. Also, when instructing an output of a value other than 0 to a unit cell according to a selection signal, this unit cell is sometimes called “selected unit cell.”
A method for randomly changing a selection as an algorithm by which a selection device selects unit cells and a method by which a selection device selects in order the cells which are not to be selected are proposed. If an error can be smoothed faster than the necessary frequency (bandwidth) for a D/A converter using oversampling technology, it is possible to shift the error to a higher frequency region than a frequency region necessary for the output of the D/A converter.
In Japan Patent Laid Open H9-18660, a method is proposed whereby by inputting a signal which drives a plurality of unit cells to a selection device and controlling by the output from a circuit which integrates once or more the usage or the non usage of unit cells, the usage frequencies of unit cells are integrated and the selection device is controlled so that the integration results are maintained as a constant
For example, the operation of error diffusion technology using a conventional selection device in a circuit which selects a unit cell using a three value selection signal (−1, 0, 1) is explained below. Furthermore, a selection signal is a signal which instructs a unit cell, which is output with the selection signal, to perform outputting. In addition, in the case of denoting “a selection signal (−1, 0, 1)” the unit cell is instructed by the selection signal to perform outputting a value either corresponding to −1 value which is a negative value, corresponding to a value 0, or corresponding to 1 value which is a positive value. Also, this is sometimes called a 3 value selection signal because an output is instructed which corresponds to either −1, 0 or 1. Furthermore, the unit cell does not operate and a signal which is sometimes not output is also included in the case where an output of a value 0 is instructed to a unit cell.
The operation of an error diffusion method which uses a 3 value selection signal (−1, 0, 1) is explained concisely using FIG. 1. A D/A converter which performs error diffusion is comprised of a digital signal X (301), a D/A converter (302), a plurality of digital selection signals Dn (303) from the D/A converter (302), a selection device (304), a selection signal Sn from the selection device (304), a plurality of unit cells (306), a plurality of outputs Ym (307) from the unit cell and an adder (308) which adds Ym. The digital selection signals Dn expresses the result of totaling the values of outputs of the unit cells (306) by the adder (308).
Table 1 shows a truth table (left side of table 1) of a selection signal Dn (303) from the D/A converter (302) and a truth table (right side of table 1) of output signals Ym (307) of unit cells are shown in table 1. The output of the D/A converter is a 2 value thermometer code and is weighted as below so that it corresponds to a 3 value selection signal by using two bits of the 2 value thermometer code in the unit cell.
TABLE 1Truth table ofTruth table of D/A output signal (Dn)cell selection(Ym)XD0D1D2D3D4D5D6D7Y0Y1Y2Y3Y+4000011111111+4+3000011101110+3+2000011001100+2+1000010001000+100000000000000−100010000000−1−1−20011000000−1−1−2−3011100000−1−1−1−3−411110000−1−1−1−1−4Here, i = (1~n/2) and j = (n/2 + 1~n).
In the case where there are 4 (m=4) unit cells as is shown in FIG. 1 and Table 1, it is possible to take the values −4, −3, −2, −1, 0, 1, 2, 3, 4 (2m+1=9) for the output Y. For example, in the case of outputting 0, if 4 unit cells among 8 unit cells are selected by 0, it is possible to output 0.
A D/A converter which uses a multi-value selection signal such as 3 values as is shown in FIG. 1 and Table 1, can reduce the number of unit cells lower than the number of values that can be taken of the output Y. Therefore, because the number of unit cells required for configuring a D/A converter can be reduced, and the required circuit scale, number of parts and area required for installment can be reduced, it is possible to reduce consumption power.
However, a conventional selection device which uses a multi-level selection signal such as 3 values (−1, 0, 1) has the following problem.
For example, when the total of outputs of unit cells by an adder should be 0, in the case where a 3 value selection signal (−1, 0, 1) is used, the output of a value 0 is instructed to 8 unit cells. In other words, 0 is output as the total by not selecting any of the 8 unit cells. In an oversampling D/A converter, in the case where a value close to 0 is output, a value close to 0 is output by the time average between a state in which 1 unit cell is selected among 8 unit cells and a state in which none of the 8 unit cells are selected. In other words, among the selection signals the frequency with which −1, 1, are output decreases. That is, in the case of a 3 value selection signal (−1, 0, 1,), the frequency of outputting a selection signal which is not 0 decreases when outputting a level close to Y=0. In this way, the number of selected unit cells is reduced.
FIG. 2 shows modes in which unit cells Ym are selected in the time direction, by comparing the cases of (a) where a selection device is used and (b) where a selection device is not used, in the case where a 3 value selection signal (−1, 0, 1) is used.
In the examples in FIG. 2, a D/A converter outputs a signal close to 0, that is, a selection signal so that either 0 or 1 among 4 is selected in turns. As shown in the diagram, a selection signal from the selection device is similarly output so that either 0 or 1 among 4 is selected in turns. In both cases, the same number of unit cells are selected, and in the case where a selection device is not used, a selection signal from a D/A converter always selects the same unit cell, whereas in the case where a selection device is used, the unit cell which is selected by a selection signal from the selection device changes with time. In FIG. 2, in the case where a selection device is used, an algorithm is used which selects in order cells which are not selected. As a result, at first, (0001) the same as an input is selected, and (0000) is selected in the next time period, and because (0000) is also selected in the next time period, it takes time for all the unit cells to be output equally.
As stated above, in the error diffusion technology, by changing each time the method by which a unit cell is selected, the error is smoothed by equally using all the unit cells. Therefore, when the time required for using unit cells equally becomes longer, the error diffusion effects become weaker and the influence of the error on the unit cells cannot be removed.
As explained above, in the case where the error diffusion technology is used in a selection device which selects a unit cell using a 3 value selection signal (−1, 0, 1), because it is possible to reduce the number of unit cells lower than the number of values which can be output, the number of unit cells necessary for configuring a D/A converter can be decreased, the required circuit scale and number of parts and required area for realizing a semiconductor can be reduced and power consumption can also be reduced. However, when the total of unit cell outputs is a value close to 0 by a selection signal from a D/A converter, the number of cells selected by a selection signal from the selection device decreases. As a result, the time for smoothing the error becomes longer and the effects of the error diffusion become weaker.
In particular, a digital speaker system is proposed in WO2007/135928A1 which directly converts a digital signal into an analog signal using a circuit input with a digital audio signal and which outputs a plurality of digital signals and a plurality of coils (units) which are driven by the plurality of digital signals. In order to realize this digital speaker system, it is preferable to select a unit cell using a 3 value selection signal (−1, 0, 1) in order to secure an SNR with as few coils as possible. In addition, because a manufacturing error of a coil which is a mechanical part has a larger variation error compared to a semiconductor electronic part and can not be ignored, a selection device which has sufficient error diffusion effects is necessary for realizing a digital speaker system.